8: On-Chip Dynamic Power Supplies for Mixed-Signal SoCs
- Ayman Fayed, The Ohio State University
The diminishing returns of semiconductor technology scaling in terms of power reduction is forcing the electronics industry to shift from the traditional approach of using a few centralized static power supplies to power a System-on-Chip (SoC) to a numerous distributed dynamic power supplies approach. In this approach, the SoC is divided into sub-components, each with its own independent on-chip power supply that is dynamically adapted to the real-time demand of each sub-component. As a result, the overall power consumption of the SoC can be significantly reduced. However, such approach requires a large number of dynamic on-chip power supplies, and it becomes quite challenging to implement them in a size- and cost-effective manner while also maintaining high power conversion efficiency, particularly in nanometer CMOS technologies where the voltage rating of transistors is quite low compared to Li-Ion battery levels. This tutorial will present the various techniques used to implement a large number of on-chip dynamic power supplies in mixed-signal SoCs, along with a discussion of the advantages and shortcomings of each technique taking into account factors such as design complexity, silicon area, efficiency, and passive components requirements. The tutorial will start with a brief overview of the concept of distributed dynamic powering of SoCs, followed by a short review of the basic operation of buck converters and the role of the switching frequency in the dynamic behavior and passive components sizes. The tutorial will then focus on high frequency buck converters with on-chip passives, and multi-frequency SIMO buck converters with on-chip outputs. This includes techniques for implementing on-chip inductors and capacitors, power switches, and gate-drive circuits. The tutorial will be concluded with a brief discussion of future trends and the likelihood of various techniques to be adopted in the industry.
received his M.Sc. and Ph.D. degrees in Electrical & Computer Engineering from The Ohio State University in 2000 and 2004 respectively. From 2000 to 2009, he held several technical positions in the area of analog and mixed-signal and power management IC design at Texas Instruments Inc., where he contributed to many product lines for wire-line, wireless, and multi-media devices. From 2000 to 2005, he was with the Connectivity Solutions Dept. at TI, where he worked on the analog frontend design of various high-speed wire-line transceivers, and on fully integrated switching/linear regulators and battery chargers for portable media players. From 2005 to 2009, he was a member of the technical staff with the wireless analog technology center at TI, where he worked on delta-sigma data converters for various wireless standards, and on the development of fully-integrated power management solutions for mixed-signal SoCs with multi-RF cores in nanometer CMOS. Dr. Fayed joined the Dept. of Electrical & Computer Engineering at Iowa State University in 2009, where he held the Northrop Grumman Assistant Professorship. He then joined the Dept. of Electrical & Computer Engineering at The Ohio State University in 2015 as an associate professor. He is the founder and director of the Power Management Research Lab (PMRL) and his current research interests include on-chip power grids for dynamic energy distribution in highly-integrated systems, high-frequency switching regulators with on-chip and on-package passives for SoCs, low-noise power supplies and power supply modulators for analog and RF circuits, energy-harvesting and battery charging platforms for power-restricted & remotely-deployed systems, and power conversion in emerging technologies. Dr. Fayed is a senior member of IEEE, an associate editor for IEEE TCAS-I and previously for TCAS-II, and serves in the technical program committee of RFIC, ISCAS, and the steering committee of MWSCAS. He is the author/co-author of many publications in the field and holds 10 US patents. Dr. Fayed is a recipient of NSF CAREER Award in 2013, and a co-recipient of the 2015 Darlington Best Transactions Paper Award from the IEEE Circuits and System Society.